
Spyder3 GigE Vision SG-14 Monochrome Cameras User’s Manual 71
Teledyne DALSA 03-032-20123-01
Note on the Frame Active Trigger
When the frame trigger goes high, the PC will collect data until either, the signal goes low, or the frame
buffer is filled. The frame height length will be determined by the length of the frame trigger.
At this point you can enable frame delayer as well.
Figure 56: Frame Active Delay
Outputs
Outputs are used to control external devices and monitor internal signals.
Step 1
Select the output line.
Step 2
Set the Signal Routing Block parameter. Refer to section ―PLC Input Signal Routing Block‖ for more
detail about PLC settings.
Important Note: Signals PLC_10 to PLC_15 should not be changed unless you are very experienced with
triggers and PLC settings.
Step 3
Set the signal output: Q0 to Q3.
Use the lookup table to output signals to one of 4 GPIO outputs.
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